Plltxe.
@plltxe · Post #5883 · 03/12/2026, 12:00 AM
Either my understanding of #Bidi is off, or Jordan Police screw up their Bidi RT: https://twitter.com/Police_Jo/status/2031410145427616135#RTL🐟
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Source channel @githubtrending · Post #14815 · Jun 10
#jupyter_notebook#chatglm#chatglm3#gemma_2b_it#glm_4#internlm2#llama3#llm#lora#minicpm#q_wen#qwen#qwen1_5#qwen2 This guide helps beginners set up and use open-source large language models (LLMs) on Linux or cloud platforms like AutoDL, with step-by-step instructions for environment setup, model deployment, and fine-tuning for models such as LLaMA, ChatGLM, and InternLM[2][4][5]. It covers everything from basic installation to advanced techniques like LoRA and distributed fine-tuning, and supports integration with tools like LangChain and online demo deployment. The main benefit is making powerful AI models accessible and easy to use for students, researchers, and anyone interested in experimenting with or customizing LLMs for their own projects[2][4][5]. https://github.com/datawhalechina/self-llm
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@githubtrending · Post #15220 · 10/14/2025, 01:00 PM
#verilog#cocotb#embedded#fpga#iss#risc_v#rtl#verilator#verilog#vpn#vproc#wireguard This project creates an open-source, hardware-based WireGuard VPN using an affordable FPGA board, making fast and secure VPNs more accessible. Unlike slow software VPNs or costly proprietary hardware, this FPGA design runs WireGuard encryption and packet processing at near wire speed without needing a PC host. It uses common tools and languages (SystemVerilog, open-source FPGA tools) and includes a soft CPU for control tasks and hardware logic for data encryption and routing. This means you get a faster, more efficient, and customizable VPN solution that is open and affordable, ideal for learning, development, or deployment in cost-sensitive environments. https://github.com/chili-chips-ba/wireguard-fpga