Plltxe.
@plltxe · Post #5883 · 03/12/2026, 12:00 AM
Either my understanding of #Bidi is off, or Jordan Police screw up their Bidi RT: https://twitter.com/Police_Jo/status/2031410145427616135#RTL🐟
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Source channel @githubtrending · Post #15180 · Sep 29
#other You can use a set of markdown files to guide AI coding assistants step-by-step in building software features. This method breaks down your feature idea into a clear Product Requirement Document (PRD), then into detailed tasks, and finally lets the AI work on each task one at a time while you review and approve progress. This structured workflow helps you keep control, avoid errors, and track progress visually, making AI-assisted development more reliable and manageable. It works with many AI tools and improves the quality and clarity of AI-generated code, saving you time and reducing frustration during complex feature development. https://github.com/snarktank/ai-dev-tasks
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@githubtrending · Post #15220 · 10/14/2025, 01:00 PM
#verilog#cocotb#embedded#fpga#iss#risc_v#rtl#verilator#verilog#vpn#vproc#wireguard This project creates an open-source, hardware-based WireGuard VPN using an affordable FPGA board, making fast and secure VPNs more accessible. Unlike slow software VPNs or costly proprietary hardware, this FPGA design runs WireGuard encryption and packet processing at near wire speed without needing a PC host. It uses common tools and languages (SystemVerilog, open-source FPGA tools) and includes a soft CPU for control tasks and hardware logic for data encryption and routing. This means you get a faster, more efficient, and customizable VPN solution that is open and affordable, ideal for learning, development, or deployment in cost-sensitive environments. https://github.com/chili-chips-ba/wireguard-fpga