Plltxe.
@plltxe · Post #5883 · 03/12/2026, 12:00 AM
Either my understanding of #Bidi is off, or Jordan Police screw up their Bidi RT: https://twitter.com/Police_Jo/status/2031410145427616135#RTL🐟
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Source channel @githubtrending · Post #15186 · Oct 2
#cplusplus Tile Language (tile-lang) is a simple, Python-like programming language that helps you write fast GPU and CPU code for tasks like matrix multiplication and attention mechanisms. It uses a smart compiler based on TVM to optimize your code automatically, so you get high performance without dealing with complex low-level details. Tile-lang supports many devices including NVIDIA and AMD GPUs and offers examples and tools to help you write, test, and profile your kernels easily. Installing it is straightforward via pip or from source. This lets you develop efficient AI and math kernels faster and with less effort, improving productivity and performance on modern hardware. https://github.com/tile-ai/tilelang
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@githubtrending · Post #15220 · 10/14/2025, 01:00 PM
#verilog#cocotb#embedded#fpga#iss#risc_v#rtl#verilator#verilog#vpn#vproc#wireguard This project creates an open-source, hardware-based WireGuard VPN using an affordable FPGA board, making fast and secure VPNs more accessible. Unlike slow software VPNs or costly proprietary hardware, this FPGA design runs WireGuard encryption and packet processing at near wire speed without needing a PC host. It uses common tools and languages (SystemVerilog, open-source FPGA tools) and includes a soft CPU for control tasks and hardware logic for data encryption and routing. This means you get a faster, more efficient, and customizable VPN solution that is open and affordable, ideal for learning, development, or deployment in cost-sensitive environments. https://github.com/chili-chips-ba/wireguard-fpga