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Source channel @githubtrending · Post #15220 · Oct 14

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#verilog#cocotb#embedded#fpga#iss#risc_v#rtl#verilator#verilog#vpn#vproc#wireguard This project creates an open-source, hardware-based WireGuard VPN using an affordable FPGA board, making fast and secure VPNs more accessible. Unlike slow software VPNs or costly proprietary hardware, this FPGA design runs WireGuard encryption and packet processing at near wire speed without needing a PC host. It uses common tools and languages (SystemVerilog, open-source FPGA tools) and includes a soft CPU for control tasks and hardware logic for data encryption and routing. This means you get a faster, more efficient, and customizable VPN solution that is open and affordable, ideal for learning, development, or deployment in cost-sensitive environments. https://github.com/chili-chips-ba/wireguard-fpga

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#verilog#cocotb#embedded#fpga#iss#risc_v#rtl#verilator#vpn#vproc#wireguard
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pixiv

@pixiv · Post #308 · 09/26/2017, 02:10 PM

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#Dragon ポ～ン（出水ぽすか） pixiv.net/i/64963600

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#dragon
PTPP Actions

@PTPPAction · Post #2352 · 09/18/2024, 06:44 AM

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#dragon#open 抢先体验版本不保证稳定性 feat：调整图表样式 commit 调整图表样式 * 调整图表样式 * Merge branch 'pt-plugins:dev' into dev * feat：调整图表样式 描述 * feat：调整图表样式 X轴日期格式保持一致

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#dragon#open
PTPP Actions

@PTPPAction · Post #2325 · 09/11/2024, 08:04 AM

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#dragon#open 抢先体验版本不保证稳定性 feat：调整图表样式 commit feat：调整图表样式 描述 * feat：调整图表样式 X轴日期格式保持一致

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#dragon#open
PTPP Actions

@PTPPAction · Post #2354 · 09/18/2024, 01:16 PM

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#dev#dragon#merged 推荐下载 feat：调整图表样式 (#1994) commit feat：调整图表样式 (#1994) * feat：调整图表样式

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#dev#dragon#merged
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