#verilog#cocotb#embedded#fpga#iss#risc_v#rtl#verilator#verilog#vpn#vproc#wireguard
This project creates an open-source, hardware-based WireGuard VPN using an affordable FPGA board, making fast and secure VPNs more accessible. Unlike slow software VPNs or costly proprietary hardware, this FPGA design runs WireGuard encryption and packet processing at near wire speed without needing a PC host. It uses common tools and languages (SystemVerilog, open-source FPGA tools) and includes a soft CPU for control tasks and hardware logic for data encryption and routing. This means you get a faster, more efficient, and customizable VPN solution that is open and affordable, ideal for learning, development, or deployment in cost-sensitive environments.
https://github.com/chili-chips-ba/wireguard-fpga
RsS iS dEaD LOL: discover RSS Feeds of your follows on Mastodon
频道曾经提及过一个叫 FeedsMage 的服务,用于从你 fo 的推友的 Bio 里找链接,再从链接里找 Feed ,最后可生成一个 #OPML 文件。RsS iS dEaD LOL 则是长毛象版的 FeedsMage,从你 fo 的 Fediverse 用户的 Bio 里找链接,发现 RSS,然后可生成 #OPML:
https://rss-is-dead.lol/
例如我的:
https://rss-is-dead.lol/user?profileUrl=https%3A%2F%2Fmastodon.social%2Fusers%2FAboutRSS
发现于作者嘟文:
https://mastodon.social/@paulcuth/112178886374464145