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Source channel @githubtrending · Post #15220 · Oct 14

#verilog#cocotb#embedded#fpga#iss#risc_v#rtl#verilator#verilog#vpn#vproc#wireguard This project creates an open-source, hardware-based WireGuard VPN using an affordable FPGA board, making fast and secure VPNs more accessible. Unlike slow software VPNs or costly proprietary hardware, this FPGA design runs WireGuard encryption and packet processing at near wire speed without needing a PC host. It uses common tools and languages (SystemVerilog, open-source FPGA tools) and includes a soft CPU for control tasks and hardware logic for data encryption and routing. This means you get a faster, more efficient, and customizable VPN solution that is open and affordable, ideal for learning, development, or deployment in cost-sensitive environments. https://github.com/chili-chips-ba/wireguard-fpga

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djangoproject

@djangoproject · Post #424 · 08/26/2017, 08:43 AM

http://scitools.org.uk/cartopy/docs/latest/index.html Cartopy is a Python package designed to make drawing maps for data analysis and visualisation as easy as possible. #Cartopy makes use of the powerful #PROJ.4, #numpy and #shapely libraries and has a simple and intuitive drawing interface to #matplotlib for creating publication quality maps. Some of the key features of cartopy are: object oriented projection definitions point, line, vector, polygon and image transformations between projections integration to expose advanced mapping in matplotlib with a simple and intuitive interface powerful vector data handling by integrating shapefile reading with Shapely capabilities