Plltxe.
@plltxe · Post #5883 · 03/12/2026, 12:00 AM
Either my understanding of #Bidi is off, or Jordan Police screw up their Bidi RT: https://twitter.com/Police_Jo/status/2031410145427616135#RTL🐟
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Source channel @githubtrending · Post #15314 · Dec 6
#python#brain_inspired_ai#deep_learning#large_language_models#reasoning The Hierarchical Reasoning Model (HRM) is a new type of AI that reasons more like a human brain, using a fast part for quick details and a slow part for big-picture planning. It solves hard logic tasks like Sudoku, mazes, and IQ-style puzzles very well, even though it is tiny (only 27 million parameters) and learns from very little data (just 1,000 examples). Unlike most large language models, it does not need long chains of written reasoning steps or huge amounts of training, which makes it much faster, cheaper, and more efficient. For the user, this means powerful reasoning in a small, fast system that can run on ordinary hardware and still beat much larger models on tough problems. https://github.com/sapientinc/HRM
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@githubtrending · Post #15220 · 10/14/2025, 01:00 PM
#verilog#cocotb#embedded#fpga#iss#risc_v#rtl#verilator#verilog#vpn#vproc#wireguard This project creates an open-source, hardware-based WireGuard VPN using an affordable FPGA board, making fast and secure VPNs more accessible. Unlike slow software VPNs or costly proprietary hardware, this FPGA design runs WireGuard encryption and packet processing at near wire speed without needing a PC host. It uses common tools and languages (SystemVerilog, open-source FPGA tools) and includes a soft CPU for control tasks and hardware logic for data encryption and routing. This means you get a faster, more efficient, and customizable VPN solution that is open and affordable, ideal for learning, development, or deployment in cost-sensitive environments. https://github.com/chili-chips-ba/wireguard-fpga