Plltxe.
@plltxe · Post #5883 · 03/12/2026, 12:00 AM
Either my understanding of #Bidi is off, or Jordan Police screw up their Bidi RT: https://twitter.com/Police_Jo/status/2031410145427616135#RTL🐟
TGTGInsighttelegram intelligenceLIVE / telegram public index
TGINSIGHT SIMILAR POSTS
Find similar content
Source channel @githubtrending · Post #15341 · Dec 18
#c_lang#driver#flash#jedec#jedec_sfdp#qspi#sfdp#sfdp_flash#spi_flash#universal_driver **SFUD** is an open-source library that drives many SPI/QSPI Flash chips from brands like Winbond and Macronix. It auto-detects chip specs via the **SFDP** standard or a built-in table, letting you read, write, erase, and init with simple APIs after easy config. This helps you avoid risks from Flash shortages or upgrades, boosts software reuse across projects, cuts dev time, and enables tools like programmers—saving effort on varied hardware. https://github.com/armink/SFUD
Results
2 similar posts found
Search: #rtl
当前筛选 #rtl清除筛选
GitHub Trends
@githubtrending · Post #15220 · 10/14/2025, 01:00 PM
#verilog#cocotb#embedded#fpga#iss#risc_v#rtl#verilator#verilog#vpn#vproc#wireguard This project creates an open-source, hardware-based WireGuard VPN using an affordable FPGA board, making fast and secure VPNs more accessible. Unlike slow software VPNs or costly proprietary hardware, this FPGA design runs WireGuard encryption and packet processing at near wire speed without needing a PC host. It uses common tools and languages (SystemVerilog, open-source FPGA tools) and includes a soft CPU for control tasks and hardware logic for data encryption and routing. This means you get a faster, more efficient, and customizable VPN solution that is open and affordable, ideal for learning, development, or deployment in cost-sensitive environments. https://github.com/chili-chips-ba/wireguard-fpga