Plltxe.
@plltxe · Post #5883 · 03/12/2026, 12:00 AM
Either my understanding of #Bidi is off, or Jordan Police screw up their Bidi RT: https://twitter.com/Police_Jo/status/2031410145427616135#RTL🐟
TGTGInsighttelegram intelligenceLIVE / telegram public index
TGINSIGHT SIMILAR POSTS
Find similar content
Source channel @githubtrending · Post #15378 · Dec 31
#javascript#erp#hacktoberfest#odoo#python OCA/web offers 40+ free addons for Odoo 18 web interface, like dark mode, responsive design, custom calendars, notifications, charts, and tree view improvements with maintainers listed. All pass pre-commit, build, and translation checks, licensed AGPL-3.0 or per module. You gain easy UI enhancements to customize Odoo backend faster, boost usability on mobile/touchscreens, save time on exports/filters, and improve productivity without coding from scratch. https://github.com/OCA/web
Results
2 similar posts found
Search: #rtl
当前筛选 #rtl清除筛选
GitHub Trends
@githubtrending · Post #15220 · 10/14/2025, 01:00 PM
#verilog#cocotb#embedded#fpga#iss#risc_v#rtl#verilator#verilog#vpn#vproc#wireguard This project creates an open-source, hardware-based WireGuard VPN using an affordable FPGA board, making fast and secure VPNs more accessible. Unlike slow software VPNs or costly proprietary hardware, this FPGA design runs WireGuard encryption and packet processing at near wire speed without needing a PC host. It uses common tools and languages (SystemVerilog, open-source FPGA tools) and includes a soft CPU for control tasks and hardware logic for data encryption and routing. This means you get a faster, more efficient, and customizable VPN solution that is open and affordable, ideal for learning, development, or deployment in cost-sensitive environments. https://github.com/chili-chips-ba/wireguard-fpga