@plltxe · Post #5883 · 03/12/2026, 12:00 AM
Either my understanding of #Bidi is off, or Jordan Police screw up their Bidi RT: https://twitter.com/Police_Jo/status/2031410145427616135#RTL🐟
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Source channel @githubtrending · Post #15415 · Jan 15
#go#bpf#cncf#cni#containers#ebpf#k8s#kernel#kubernetes#kubernetes_networking#loadbalancing#monitoring#networking#observability#security#troubleshooting#xdp Cilium is an eBPF-based tool for Kubernetes that delivers fast networking, deep visibility, and strong security. It creates simple Layer 3 networks across clusters, handles load balancing to replace kube-proxy, enforces identity-based policies from L3 to L7 (like HTTP or DNS rules), supports service mesh with encryption, and offers Hubble for real-time traffic monitoring. Stable versions like v1.18.6 run on AMD64/AArch64. You gain scalable performance, easier policy management without IP hassles, better troubleshooting, and higher efficiency for large cloud-native apps, cutting costs and boosting reliability. https://github.com/cilium/cilium
Search: #rtl
@plltxe · Post #5883 · 03/12/2026, 12:00 AM
Either my understanding of #Bidi is off, or Jordan Police screw up their Bidi RT: https://twitter.com/Police_Jo/status/2031410145427616135#RTL🐟
@githubtrending · Post #15220 · 10/14/2025, 01:00 PM
#verilog#cocotb#embedded#fpga#iss#risc_v#rtl#verilator#verilog#vpn#vproc#wireguard This project creates an open-source, hardware-based WireGuard VPN using an affordable FPGA board, making fast and secure VPNs more accessible. Unlike slow software VPNs or costly proprietary hardware, this FPGA design runs WireGuard encryption and packet processing at near wire speed without needing a PC host. It uses common tools and languages (SystemVerilog, open-source FPGA tools) and includes a soft CPU for control tasks and hardware logic for data encryption and routing. This means you get a faster, more efficient, and customizable VPN solution that is open and affordable, ideal for learning, development, or deployment in cost-sensitive environments. https://github.com/chili-chips-ba/wireguard-fpga