Plltxe.
@plltxe · Post #5883 · 03/12/2026, 12:00 AM
Either my understanding of #Bidi is off, or Jordan Police screw up their Bidi RT: https://twitter.com/Police_Jo/status/2031410145427616135#RTL🐟
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Source channel @githubtrending · Post #15432 · Jan 23
#jupyter_notebook#chinese_llm#chinese_nlp#finetune#generative_ai#instruct_gpt#instruction_set#llama#llm#lora#open_models#open_source#open_source_models#qlora AirLLM is a tool that lets you run very large AI models on computers with limited memory by using a smart layer-by-layer loading technique instead of traditional compression methods. You can run a 70-billion-parameter model on just 4GB of GPU memory, or even a 405-billion-parameter model on 8GB, without losing model quality. The benefit is that you can use powerful AI models on affordable hardware without expensive upgrades, and the tool also offers optional compression features that can speed up performance by up to 3 times while maintaining accuracy. https://github.com/lyogavin/airllm
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@githubtrending · Post #15220 · 10/14/2025, 01:00 PM
#verilog#cocotb#embedded#fpga#iss#risc_v#rtl#verilator#verilog#vpn#vproc#wireguard This project creates an open-source, hardware-based WireGuard VPN using an affordable FPGA board, making fast and secure VPNs more accessible. Unlike slow software VPNs or costly proprietary hardware, this FPGA design runs WireGuard encryption and packet processing at near wire speed without needing a PC host. It uses common tools and languages (SystemVerilog, open-source FPGA tools) and includes a soft CPU for control tasks and hardware logic for data encryption and routing. This means you get a faster, more efficient, and customizable VPN solution that is open and affordable, ideal for learning, development, or deployment in cost-sensitive environments. https://github.com/chili-chips-ba/wireguard-fpga