@plltxe · Post #5883 · 03/12/2026, 12:00 AM
Either my understanding of #Bidi is off, or Jordan Police screw up their Bidi RT: https://twitter.com/Police_Jo/status/2031410145427616135#RTL🐟
TGINSIGHT SIMILAR POSTS
Source channel @githubtrending · Post #15439 · Jan 27
#rust#protobuf#rust Prost is a Rust tool that turns Protocol Buffers (.proto) files into simple, readable Rust code for proto2/proto3. It keeps comments, uses Rust derives for clean types, handles packages as modules, preserves unknown enums, and serializes existing types easily—add to Cargo.toml and use prost-build in build.rs. You benefit by getting fast, safe, idiomatic Rust for efficient data serialization in gRPC/microservices, saving time on boilerplate while ensuring memory safety and performance. https://github.com/tokio-rs/prost
Search: #rtl
@plltxe · Post #5883 · 03/12/2026, 12:00 AM
Either my understanding of #Bidi is off, or Jordan Police screw up their Bidi RT: https://twitter.com/Police_Jo/status/2031410145427616135#RTL🐟
@githubtrending · Post #15220 · 10/14/2025, 01:00 PM
#verilog#cocotb#embedded#fpga#iss#risc_v#rtl#verilator#verilog#vpn#vproc#wireguard This project creates an open-source, hardware-based WireGuard VPN using an affordable FPGA board, making fast and secure VPNs more accessible. Unlike slow software VPNs or costly proprietary hardware, this FPGA design runs WireGuard encryption and packet processing at near wire speed without needing a PC host. It uses common tools and languages (SystemVerilog, open-source FPGA tools) and includes a soft CPU for control tasks and hardware logic for data encryption and routing. This means you get a faster, more efficient, and customizable VPN solution that is open and affordable, ideal for learning, development, or deployment in cost-sensitive environments. https://github.com/chili-chips-ba/wireguard-fpga