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Source channel @githubtrending · Post #15535 · Mar 3

#shell ESP-CSI uses Wi-Fi Channel State Information (CSI) on all ESP32 chips to sense breathing, chewing, walking, or other movements without contact or extra hardware. You get rich data like signal phase and amplitude for smart monitoring, activity detection, positioning, and AI apps, with easy OTA upgrades, BLE help, and examples for quick starts like radar or cloud uploads—saving costs while boosting your IoT projects' accuracy and reliability. https://github.com/espressif/esp-csi

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Plltxe.

@plltxe · Post #5883 · 03/12/2026, 12:00 AM

Either my understanding of #Bidi is off, or Jordan Police screw up their Bidi RT: https://twitter.com/Police_Jo/status/2031410145427616135#RTL🐟

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@githubtrending · Post #15220 · 10/14/2025, 01:00 PM

#verilog#cocotb#embedded#fpga#iss#risc_v#rtl#verilator#verilog#vpn#vproc#wireguard This project creates an open-source, hardware-based WireGuard VPN using an affordable FPGA board, making fast and secure VPNs more accessible. Unlike slow software VPNs or costly proprietary hardware, this FPGA design runs WireGuard encryption and packet processing at near wire speed without needing a PC host. It uses common tools and languages (SystemVerilog, open-source FPGA tools) and includes a soft CPU for control tasks and hardware logic for data encryption and routing. This means you get a faster, more efficient, and customizable VPN solution that is open and affordable, ideal for learning, development, or deployment in cost-sensitive environments. https://github.com/chili-chips-ba/wireguard-fpga