Either my understanding of #Bidi is off, or Jordan Police screw up their Bidi RT: https://twitter.com/Police_Jo/status/2031410145427616135#RTL🐟
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Источник @procode404 · Post #3071 · 21 июн.
🐍Стань Python джедаем Плейлист из 20 максимально доступных уроков по Python от популярного русскоязычного ютубера. 1. Введение [12:02] 2. Простые операции [10:31] 3. Работа со строками [15:23] 4. Типы данных, переменные [14:26] 5. Управляющие структуры [25:56] 6. Множественные условия [10:32] 7. Циклы [10:26] Перейти к плейлисту #видео#python
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@githubtrending · Post #15220 · 14.10.2025, 13:00
#verilog#cocotb#embedded#fpga#iss#risc_v#rtl#verilator#verilog#vpn#vproc#wireguard This project creates an open-source, hardware-based WireGuard VPN using an affordable FPGA board, making fast and secure VPNs more accessible. Unlike slow software VPNs or costly proprietary hardware, this FPGA design runs WireGuard encryption and packet processing at near wire speed without needing a PC host. It uses common tools and languages (SystemVerilog, open-source FPGA tools) and includes a soft CPU for control tasks and hardware logic for data encryption and routing. This means you get a faster, more efficient, and customizable VPN solution that is open and affordable, ideal for learning, development, or deployment in cost-sensitive environments. https://github.com/chili-chips-ba/wireguard-fpga